Product Summary

The XC95144XL-TQG100AWN is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. The XC95144XL-TQG100AWN is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.

Parametrics

XC95144XL-TQG100AWN absolute maximum ratings: (1)VCC Supply voltage relative to GND: –0.5 to 4.0 V; (2)VIN Input voltage relative to GND: –0.5 to 5.5 V; (3)VTS Voltage applied to 3-state output: –0.5 to 5.5 V; (4)TSTG Storage temperature (ambient): –65 to +150 ℃; (5)TSOL Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm): +220 ℃; (6)TJ Junction temperature: +150 ℃.

Features

XC95144XL-TQG100AWN features: (1)5 ns pin-to-pin logic delays; (2)System frequency up to 178 MHz; (3)144 macrocells with 3,200 usable gates; (4)Available in small footprint packages; (5)Optimized for high-performance 3.3V systems; (6)Advanced system features; (7)Fast concurrent programming; (8)Slew rate control on individual outputs; (9)Enhanced data security features; (10)Excellent quality and reliability; (11)Pin-compatible with 5V-core XC95144 device in the 100-pin TQFP package.

Diagrams

XC95144XL-TQG100AWN diagram

XC9500
XC9500

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Data Sheet

Negotiable 
XC9500XV
XC9500XV

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Negotiable 
XC9501
XC9501

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Negotiable 
XC9502
XC9502

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Negotiable 
XC9503
XC9503

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Negotiable 
XC9503B093AR-G
XC9503B093AR-G


IC REG BUCK ADJ 1A DL 10MSOP

Data Sheet

0-1: $1.19
1-10: $1.07
10-25: $0.96
25-100: $0.86
100-250: $0.77
250-500: $0.67